chipsLDPC
  • Getting started
    • Requirements
    • Test the project
    • Emit RTL
    • Run the BB144 examples
  • Architecture
    • BP decoder
      • Static Tanner network
      • Node arithmetic
      • Autonomous vanilla BP
      • Inspect and test
    • Relay BP
      • Bias and coefficients
      • Leg control
      • Result semantics
      • Inspect and test
    • Filtered OSD-0
      • Filtering and order
      • Progressive solve
      • BP composition
      • Inspect and test
    • Systolic GF(2) solver
      • Processing elements and mesh
      • Framed solver
      • Inspect and test
    • Structure
    • Interfaces
  • Experiments
    • BP only
    • Relay BP
    • Iteration budget
  • Verification
  • QEC background
    • Min-sum messages
    • Post-processing
chipsLDPC
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